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Solving AES-SAT Using Side-Channel Hints: A Practical Assessment
KTH, School of Electrical Engineering and Computer Science (EECS), Electrical Engineering, Electronics and Embedded systems.ORCID iD: 0000-0001-7382-9408
2025 (English)In: Proceedings - 2025 IEEE 55th International Symposium on Multiple-Valued Logic, ISMVL 2025, Institute of Electrical and Electronics Engineers (IEEE) , 2025, p. 147-152Conference paper, Published paper (Refereed)
Abstract [en]

Side-channel attacks exploit information leaked through non-primary channels, such as power consumption, electromagnetic emissions, or timing, to extract sensitive data from cryptographic devices. Over the past three decades, side-channel analysis has evolved into a mature research field with well-established methodologies for analyzing standard cryptographic algorithms like the Advanced Encryption Standard (AES). However, the integration of side-channel analysis with formal methods remains relatively unexplored. In this paper, we present a hybrid attack on AES that combines side-channel analysis with SAT. We model AES as a SAT problem and leverage hints of the input and output values of the S-boxes, extracted via profiled deep learning-based power analysis, to solve it. Experimental results on an ATXmega128D4 MCU implementation of AES-128 demonstrate that the SAT-assisted approach consistently recovers the full encryption key from a single trace, captured from devices different from those used for profiling, within one hour. In contrast, without SAT assistance, the success rate remains below 80% after 26 hours of key enumeration.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE) , 2025. p. 147-152
Keywords [en]
AES, power analysis, SAT, Side-channel attack
National Category
Computer Sciences Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-368820DOI: 10.1109/ISMVL64713.2025.00036ISI: 001540510800028Scopus ID: 2-s2.0-105009322240OAI: oai:DiVA.org:kth-368820DiVA, id: diva2:1994373
Conference
55th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2025, Montreal, Canada, Jun 5 2025 - Jun 6 2025
Note

Part of ISBN 9798331507442

QC 20250902

Available from: 2025-09-02 Created: 2025-09-02 Last updated: 2025-12-08Bibliographically approved

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Dubrova, Elena

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CiteExportLink to record
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  • apa
  • ieee
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