Enabling Efficient Vectorization in Particle-In-Cell Monte Carlo Simulations on X86 and RISC-VShow others and affiliations
2026 (English)In: 2026 25th International Symposium on Parallel and Distributed Computing (ISPDC), Institute of Electrical and Electronics Engineers (IEEE), 2026Conference paper, Published paper (Refereed)
Abstract [en]
Particle-in-cell (PIC) codes enable high-performance simulations of plasma dynamics, providing accurate modeling of electron and ion interactions in realistic configuration of fusion devices. Such codes have very long execution times even if they are parallelized using MPI so the need to optimize them is critical. Vector processors can improve performance and parallel execution for many types of applications. This paper studies BIT1, a representative PIC code, to assess the benefit from Vector/SIMD architectures using automatic and manual vectorization. We provide an extensive evaluation study on x86 and RISC-V platforms and improve BIT1 code to enable better vectorization and increase its performance. Our findings show that a portable solution (with minor code updates) enhances the performance using the out-of-the-box compiler's auto-vectorization capabilities on x86 by 76 % and on RISC-V by 2× using auto or manual vectorization with 2 MPI ranks.
Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2026.
Keywords [en]
RISC-V, x86, EPAC Accelerator, Vector Computation, Performance Analysis, PIC MC Simulations
National Category
Computer Sciences Fusion, Plasma and Space Physics Computer Systems
Research subject
Computer Science
Identifiers
URN: urn:nbn:se:kth:diva-386142DOI: 10.1109/ISPDC69862.2026.00013Scopus ID: 2-s2.0-105046489055OAI: oai:DiVA.org:kth-386142DiVA, id: diva2:2088342
Conference
25th IEEE International Symposium on Parallel and Distributed Computing, Hamburg, Germany, 01-03 July 2026
Note
Part of ISBN 979-8-3195-3432-3
QC 20260727
2026-07-272026-07-272026-08-13Bibliographically approved